1. Field of the Invention
The present invention relates to a preferable pattern exposure method for use in, for example, the photolithography process in the manufacturing process of a semiconductor device.
2. Description of the Related Art
Recently, a system LSI (Large Scale Integrated Circuit), for example, having a logic portion and a memory portion mixedly or a system LSI having a portion including a lot of functions on a common semiconductor chip, is remarkably developed.
In this case, a repeated pattern of a cell portion is formed, for example, in a DRAM (Dynamic Random Access Memory) forming a memory portion, and a pattern of low density different from the memory portion in width and intervals according to the array of a gate is formed in a logic portion.
In the manufacture of a semiconductor device, a fine pattern of each portion is formed by photolithography, and especially in the manufacture of the above-mentioned system LSI, it is necessary to do exposure in the photolithography process under the same condition as for a pattern different in density and shape on the same layer.
In order to obtain a desired pattern accurately by the photolithography, it is necessary to set the optimum exposure condition depending on the pattern density and configuration, more specifically, including selection of light source for exposure, optical characteristic of an optical system, exposure amount, characteristic of a used mask, photoresist, and mask bias. As mentioned above, in the case of obtaining a pattern different in the density and configuration on the same layer, generally, a method of exposing a photoresist layer and developing it as for the whole pattern under the best condition, and finding a condition capable of getting the best mask lineality and the maximum tolerance in the depth of focus and the exposure amount, thereby to expose the photoresist layer as for the whole pattern, is used.
According to this method, there is a risk of failing to assure the tolerance in the depth of focus and the exposure amount, although the using condition meets the resolution under the same exposure condition of the different pattern density and configuration. Further, this method deteriorates the improvement in resolution ability and process tolerance, that is the original object of illumination variation and phase shift mask in selecting a mask, thereby deteriorating the defect rate in a mass production.
An object of the present invention is to enable a pattern exposure of high resolution, while assuring the process tolerance in a pattern of different density and configuration on the same layer, in the pattern exposure of, for example, photolithography, in a manufacturing process of a semiconductor device such as the above-mentioned system LSI.
The pattern exposure method according to the present invention includes a work of dividing a desired exposure pattern into pattern portions of each substantially same density and configuration and extracting the same pattern portions, at first, in the pattern exposure of the desired pattern having no uniformity in density and configuration.
In the case of the pattern exposure of a desired pattern having no uniformity in density and configuration, in the conventional way, exposure is made on the whole exposure pattern under a condition as proper as possible. On the contrary, the present invention is to include the work of dividing a desired exposure pattern into pattern portions of each substantially same density and configuration and extracting the same portions, thereby to optimize the exposure of each pattern assuredly, and thereafter apply the exposure condition of a pattern portion having the minimum process tolerance to the other pattern portions. At this time, mask bias optical proximity effect correction is performed so to make the optimum exposure amount in one accord.